Wheatstone bridge (WB) is widely used in precision measurements involving strain gauges and resistive sensors. However, maintaining balance in a full-bridge configuration becomes increasingly challenging in the presence of high-resistance tolerances - especially in printed electronics, where such variations are common. Traditional compensation methods often entail increased circuit complexity, added cost, and additional sources of error. This article proposes a novel balancing technique for fully resistive WBs, leveraging two voltage References to cancel the output offset even in the presence of resistor tolerances exceeding 0.1%. The method demonstrates robust performance with tolerance levels up to 20%, while preserving high linearity. Simulation results confirm that the approach achieves balanced operation and accurate output even with low-tolerance resistors (1%). Relative to the ideal sensitivity of (VCC-VEE) , the proposed technique maintains a worst-case sensitivity of 0.8(VCC-VEE) , with a theoretically null output offset under balanced conditions. Furthermore, linearity error remains below 0.5% of the full-scale output (FSO), matching the performance of conventional WB circuits affected by mismatch. While the resolution of the voltage references introduces a small, predictable offset - independent of power supply variations - this error is limited to the resolution of the reference itself. Experimental validation using benchtop instrumentation corroborates the simulation findings: with resistors exhibiting 10% tolerance, the maximum deviation between measured and theoretical outputs was 2.4 mV. This deviation remains negligible in terms of estimating fractional resistance changes.
Novel Method for Balancing Full Wheatstone Bridge for High-Tolerance Resistive Sensors
Borghetti M.;Sardini E.;Serpelloni M.
2025-01-01
Abstract
Wheatstone bridge (WB) is widely used in precision measurements involving strain gauges and resistive sensors. However, maintaining balance in a full-bridge configuration becomes increasingly challenging in the presence of high-resistance tolerances - especially in printed electronics, where such variations are common. Traditional compensation methods often entail increased circuit complexity, added cost, and additional sources of error. This article proposes a novel balancing technique for fully resistive WBs, leveraging two voltage References to cancel the output offset even in the presence of resistor tolerances exceeding 0.1%. The method demonstrates robust performance with tolerance levels up to 20%, while preserving high linearity. Simulation results confirm that the approach achieves balanced operation and accurate output even with low-tolerance resistors (1%). Relative to the ideal sensitivity of (VCC-VEE) , the proposed technique maintains a worst-case sensitivity of 0.8(VCC-VEE) , with a theoretically null output offset under balanced conditions. Furthermore, linearity error remains below 0.5% of the full-scale output (FSO), matching the performance of conventional WB circuits affected by mismatch. While the resolution of the voltage references introduces a small, predictable offset - independent of power supply variations - this error is limited to the resolution of the reference itself. Experimental validation using benchtop instrumentation corroborates the simulation findings: with resistors exhibiting 10% tolerance, the maximum deviation between measured and theoretical outputs was 2.4 mV. This deviation remains negligible in terms of estimating fractional resistance changes.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
