A novel, low temperature process for the formation of Si-BC8 phase is obtained while growing Silicon nanowires. The nanowires growth is performed in a CVD reactor under exposure of the substrate to microwaves, employing Sn nanospheres as catalyst and a flux of SiH4 as precursor, respectively. Microwaves allow for selective heating of the metal catalyst while keeping the substrate at low temperature. At the end of the process, silicon nanowires with the metal sphere on top are obtained, together with the (unexpected) transition of a portion of silicon substrate from the diamond to the Si-BC8 crystallographic phase. Silicon atoms in Si-BC8 phase are arranged in body-centered-cubic unit cells resulting into a different energy-wavevector diagram compared to the silicon diamond cubic phase. Indeed, Si-BC8 possesses a direct band gap as low as 30 meV at room temperature. These features may be employed in a large variety of applications, requiring CMOS-compatible manufacturing. Systematic structural analysis and a phenomenological model for Si-BC8 phase formation are discussed.

Large-scale CMOS-compatible process for silicon nanowires growth and BC8 phase formation

Rigoni, F.;
2021-01-01

Abstract

A novel, low temperature process for the formation of Si-BC8 phase is obtained while growing Silicon nanowires. The nanowires growth is performed in a CVD reactor under exposure of the substrate to microwaves, employing Sn nanospheres as catalyst and a flux of SiH4 as precursor, respectively. Microwaves allow for selective heating of the metal catalyst while keeping the substrate at low temperature. At the end of the process, silicon nanowires with the metal sphere on top are obtained, together with the (unexpected) transition of a portion of silicon substrate from the diamond to the Si-BC8 crystallographic phase. Silicon atoms in Si-BC8 phase are arranged in body-centered-cubic unit cells resulting into a different energy-wavevector diagram compared to the silicon diamond cubic phase. Indeed, Si-BC8 possesses a direct band gap as low as 30 meV at room temperature. These features may be employed in a large variety of applications, requiring CMOS-compatible manufacturing. Systematic structural analysis and a phenomenological model for Si-BC8 phase formation are discussed.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11379/609525
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