This paper presents a CMOS operational amplifier entirely based on self cascode devices with improved symmetry of slew rate. The circuit is designed in UMC 180 nm CMOS process: the proposed amplifier has a DC gain of 62 dB, a GBW of 160 MHz, a positive SR of 135 V/μs and a negative SR of 150 V/μs.
Design of a Low Voltage High Symmetrical Slew Rate Opamp Based on Self Cascode in UMC 0.18 μm
RICHELLI, Anna;KOVACS VAJNA, Zsolt Miklos
2015-01-01
Abstract
This paper presents a CMOS operational amplifier entirely based on self cascode devices with improved symmetry of slew rate. The circuit is designed in UMC 180 nm CMOS process: the proposed amplifier has a DC gain of 62 dB, a GBW of 160 MHz, a positive SR of 135 V/μs and a negative SR of 150 V/μs.File in questo prodotto:
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