A single-poly electrically erasable programmable ROM (EEPROM) cell compatible with standard CMOS process is proposed. With respect to the classical embedded NOR cell, it can be programmed and erased by Fowler-Nordheim tunneling with single-bit granularity. The memory cell is based on a novel writing-inhibition scheme enabled by the combination of the body effect with multiple half-MOS devices. Experimental results on programming, erasing, inhibition, reading, and cycling endurance are provided using a 0.13 \mu{\rm m} standard CMOS process.

Half-MOS Based Single-Poly EEPROM Cell With Program and Erase Bit Granularity

TORRICELLI, Fabrizio;MILANI, Luca;COLALONGO, Luigi;RICHELLI, Anna;KOVACS VAJNA, Zsolt Miklos
2013-01-01

Abstract

A single-poly electrically erasable programmable ROM (EEPROM) cell compatible with standard CMOS process is proposed. With respect to the classical embedded NOR cell, it can be programmed and erased by Fowler-Nordheim tunneling with single-bit granularity. The memory cell is based on a novel writing-inhibition scheme enabled by the combination of the body effect with multiple half-MOS devices. Experimental results on programming, erasing, inhibition, reading, and cycling endurance are provided using a 0.13 \mu{\rm m} standard CMOS process.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11379/332907
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