In this paper an application of Group Technology (GT) and Cellular Manufacturing concepts to scheduling printed circuit boards (PCB) assembly is discussed. The objective of the study is to design and test a procedure capable of grouping the PCBs in a number of cells with minimized setup and maximized workload balance that satisfy such quantitative constraints as the number of available inserter machines at each assembly stage, the capacity of each available machine and the maximum number of component types that can be simultaneously equipped on board each machine. A completely new heuristic is proposed for assigning sequentially the PCBs of a given mix to PCB cells in such a way that: setups are minimized; the workload balance among different machines is maximized; the PCB cells are less or equal in number to the available insertion machines; the insertion machines are utilized between user defined upper and lower utilization rates thresholds. The designed heuristic, implemented on a PC, is tested by means of a simulation model, using data coming from a real PCB assembly system, yielding interesting results.

Cell formation in PCB assembly based on production quantitative data

PERONA, Marco;
1993-01-01

Abstract

In this paper an application of Group Technology (GT) and Cellular Manufacturing concepts to scheduling printed circuit boards (PCB) assembly is discussed. The objective of the study is to design and test a procedure capable of grouping the PCBs in a number of cells with minimized setup and maximized workload balance that satisfy such quantitative constraints as the number of available inserter machines at each assembly stage, the capacity of each available machine and the maximum number of component types that can be simultaneously equipped on board each machine. A completely new heuristic is proposed for assigning sequentially the PCBs of a given mix to PCB cells in such a way that: setups are minimized; the workload balance among different machines is maximized; the PCB cells are less or equal in number to the available insertion machines; the insertion machines are utilized between user defined upper and lower utilization rates thresholds. The designed heuristic, implemented on a PC, is tested by means of a simulation model, using data coming from a real PCB assembly system, yielding interesting results.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11379/7321
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